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    • 专利摘要:
    power converter device. energy converter device for converting energy from a mains power source (201) to supply a continuous state lighting load (280) includes a converter (230) and a control circuit (350). the converter (230) includes a half-bridge inverter (220) that functions as a feeder inverter and output stage inverter, in which the half-bridge inverter has multiple switches (221, 222). the control circuit (350) is configured to control an input current from the mains and an output current from the device independently by supplying a switching signal (s_hb) to the switches on the half-bridge inverter, where the switching signal it has a duty cycle, a frequency and a cycle suppression duty cycle.
    公开号:BR112013015630B1
    申请号:R112013015630-9
    申请日:2011-12-13
    公开日:2020-12-15
    发明作者:Reinhold Elferich
    申请人:Philips Lighting Holding B.V.；
    IPC主号:
    专利说明:

    TECHNICAL FIELD
    [001] The present invention relates, in general, to the conversion of energy to lighting loads in a continuous state. More particularly, various methods and apparatus according to the present invention described herein refer to a power converter with a half-bridge inverter that functions as an integrated mains rectifier, power inverter and output stage inverter and provides correction of the energy factor with respect to the continuous state lighting load. BACKGROUND
    [002] Digital lighting technologies, that is, lighting based on semiconductor light sources, such as light emitting diodes (LED), offer a viable alternative to traditional fluorescent, HID and incandescent lamps. Functional advantages and benefits of LEDs include high energy and optical conversion efficiency, durability, lower operating costs and many others. Recent advances in LED technology have provided efficient and resilient full-spectrum light sources that allow for a variety of light effects in many applications. Some of the luminaires that incorporate these sources have a lighting module, including one or more LEDs capable of producing different colors, such as red, green and blue, as well as a processor to independently control the output of the LEDs to generate a variety of colors and color changing light effects, for example, as discussed in detail in U.S. Patent Nos. 6,016,038 and 6,211,626.
    [003] Typically, an LED-based or LED-charged lighting unit that includes multiple LED-based energy sources, such as a string of LEDs connected in series, is driven by a power converter that receives voltage and current of energy sources from the electric grid. There are a variety of power converters that have integrated power factor correction (PFC), particularly in connection with fluorescent lamp starters. Generally, power converters can be divided into two groups. The first group includes energy converters that feed part of the inverted power to the rectified power source of the mains to form the mains input current. This is done based on the feedback current and / or voltage. The second group includes power converters that have relatively direct integration, in which a power or buck-boost inverter is combined with an output stage inverter. The output stage can be a type of resonance or a derived buck converter.
    [004] With respect to the energy converters in the second group, the duty cycle of the rectified input voltage is modulated only to control the output current. These power converters only provide coverage for narrow charging ranges. In addition, smooth switching of a power inverter is capable of occurring only in parts of the operating range, or does not occur at all.
    [005] Thus, there is a need in the art for a power converter that has a half-bridge inverter that works as an integrated mains rectifier, power inverter and output stage inverter, provide power factor correctors in relation to lighting load in a continuous state and a method of operating it. SUMMARY OF THE INVENTION
    [006] The present invention relates to inventive devices and methods for providing energy conversion for continuous state lighting loads, such as LED-based lighting units. More particularly, various methods and apparatus according to the present invention described herein refer to a power converter with a half-bridge inverter that functions as an integrated mains rectifier, power inverter and output stage inverter and provides correction of the energy factor with respect to the continuous state lighting load.
    [007] Generally, in one aspect, an energy converting device is provided to convert energy from a mains power source to supply a continuous state lighting load. The device includes a converter and a control circuit. The converter includes a half-bridge inverter that functions as a power inverter and an output stage inverter, in which the half-bridge inverter has multiple switches. The control circuit is configured to control an input current from the mains and an output current from the device independently when sending a switching signal to the switches on the half-bridge inverter, where the switching signal has a duty cycle, a frequency and a duty cycle that omits cycles.
    [008] In another aspect, a power converter is provided to convert energy from a mains power source to power a light emitting diode (LED) based lighting unit, connected to a secondary side of a transformer, to receive an output current from the power converter. The power converter includes a half-bridge inverter, a resonant converter and a control circuit. The half-bridge inverter includes multiple switches. The resonant converter is connected between the half-bridge inverter and a primary side of the transformer. The control circuit is configured to send a half-bridge control signal to selectively activate the switches on the half-bridge inverter to generate a pulsed input voltage signal to the resonant converter, where the half-bridge control signal it is a square waveform that has a switching duty cycle and a duty cycle that omits cycles.
    [009] In another aspect, a power converter is provided to convert energy from a mains power source to power an LED-based lighting unit. The device includes a half-bridge inverter and a control circuit. The half-bridge inverter includes multiple switches and is configured to function as an integrated mains rectifier and output stage, where the output stage includes a resonant capacitor and a transformer. The control circuit is configured to independently control an input current from the mains and an output current from the device when sending a switching signal to the switches on the half-bridge inverter, where the switching signal has a duty cycle, a frequency and a duty cycle that omits cycles corresponding to a cycle suppression operation. The duty cycle that omits cycles is based on the comparison of multiple different signals with a corresponding limit signal, in which a first signal difference is a difference between the output current of the device and a reference output current and a second difference of signal is a difference between a resonant capacitor voltage and a reference capacitor voltage.
    [0010] As used herein for the purposes of this specification, the term "LED" shall be understood to include any electroluminescent diode or other type of carrier-based injection / junction system that is capable of generating radiation in response to a electrical signal. Therefore, the term LED includes, but is not limited to, various semiconductor-based structures that emit light in response to current, light-emitting polymers, organic light-emitting diodes (OLED), electroluminescent bands and the like. In particular, the term LED refers to light emitting diodes of all types (including semiconductors and organic light emitting diodes) that can be configured to generate radiation in one or more of the infrared spectrum, ultraviolet spectrum and various portions of the spectrum visible (usually including radiation wavelength from about 400 nanometers to about 700 nanometers). Some LED examples include, but are not limited to, various types of infrared LEDs, ultraviolet LEDs, red LEDs, blue LEDs, green LEDs, yellow LEDs, amber LEDs, orange LEDs and white LEDs (discussed below). It should also be appreciated that LEDs can be configured and / or controlled to generate radiation with various bandwidths (for example, total amplitude at maximum height, or FWHM) for a given spectrum (for example, narrow bandwidth, bandwidth wide) and a variety of dominant wavelengths within a certain general color categorization.
    [0011] For example, an implementation of an LED configured to generate essentially white light (for example, a white LED) may include a series of molds that emit, respectively, different spectra of electroluminescence that, in combination, mix to form essentially white light. In another implementation, a white light LED can be associated with a phosphor material that converts electroluminescence from a first spectrum to a different second spectrum. In an example of this implementation, electroluminescence with a spectrum with a relatively short wavelength and narrow bandwidth "pumps" the phosphor material, which in response radiates radiation with a longer wavelength that has a slightly broader spectrum.
    [0012] It should also be understood that the term LED does not limit the type of physical and / or electrical package of an LED. For example, as discussed above, an LED can refer to a single light emitting device with multiple molds that are configured to, respectively, emit different radiation spectra (for example, which may or may not be individually controllable). In addition, an LED can be associated with a phosphor that is considered an integral part of the LED (for example, some types of white LEDs). In general, the term LED can refer to packaged LEDs, non-packaged LEDs, surface-mounted LEDs, chip-on-board LEDs, T-pack LEDs, radial-pack LEDs, power-pack LEDs, LEDs that include some type of coating and / or optical element (for example, diffusing lenses) etc.
    [0013] The term "light source" should be understood as referring to any one or more of a variety of radiation sources, including, but not limited to, LED-based sources (including one or more LEDs as defined above) ), incandescent sources (for example, filament lamps, halogen lamps), fluorescent sources, phosphorescent sources, high-intensity discharge sources (for example, sodium vapor lamps, mercury vapor and metal halide), lasers, others types of electroluminescent sources, pyroluminescent sources (for example, flames), velaluminescent sources (for example, gas blankets, carbon arc radiation sources), photoluminescent sources (for example, gas discharge sources), cathodic luminescent sources that use electronic satiety, galvanoluminescent sources, crystal luminescent sources, cineluminescent sources, thermoluminescent sources, triboluminescent sources, sonoluminescent sources, radioluminescent sources luminescent polymers.
    [0014] A given light source can be configured to generate electromagnetic radiation within the visible spectrum, outside the visible spectrum or a combination of both. For this reason, the terms "light" and "radiation" are used interchangeably in the present. In addition, a light source may include as an integral component one or more filters (for example, color filters), lenses or other optical components. It should also be understood that light sources can be configured for a variety of applications, including, but not limited to, indication, display and / or lighting.
    [0015] The term “luminaire” is used in the present to refer to an implementation or arrangement of one or more lighting units in a specific form factor, assembly or packaging. The term “lighting unit” is used in the present to indicate a device that includes one or more light sources of different or identical types. A given lighting unit can have any of a number of mounting arrangements for the light source (s), housing / shelter arrangements and electrical and mechanical connection shapes and / or configurations. In addition, a given lighting unit may optionally be associated with (for example, including, coupled to and / or packaged together) various other components (for example, control circuits) relating to the operation of the source (s) of light. An “LED-based lighting unit” refers to a unit that includes one or more LED-based light sources as discussed above, alone or in combination with other non-LED-based light sources. A multi-channel lighting unit designates an LED-based or non-LED-based lighting unit that includes at least two light sources configured to respectively generate different radiation spectra, where each different source spectrum can be designated “ channel ”of the multi-channel lighting unit.
    [0016] The term "controller" is currently used to describe various devices related to the operation of one or more light sources. A controller can be implemented in several ways (for example, with dedicated hardware) to perform various functions discussed at present. A “processor” is an example of a controller that has one or more microprocessors that can be programmed using software (for example, microcode) to perform various functions discussed at present. A control can be implemented using a processor or not and can also be implemented as a combination of dedicated hardware to perform some functions and a processor (for example, one or more programmed microprocessors and associated circuits) to perform other functions. Examples of controller components that can be employed in various embodiments of the present invention include, but are not limited to, conventional microprocessors, application-specific integrated circuits (ASICs) and field programmable port sets (FPGA).
    [0017] In various embodiments, a processor or controller can be associated with one or more storage media (generally referred to herein as "memory", such as volatile and non-volatile computer memory, such as RAM, PROM, EPROM, EEPROM, floppy disks , CDs, optical discs, magnetic tape, etc.). In some embodiments, the storage media can be encoded with one or more programs that, when run on one or more processors and / or controllers, perform at least some of the functions discussed at present. Various storage media can be fixed within a processor or controller or can be transported, in such a way that one or more programs stored on that medium can be transported to a processor or controller to implement various aspects of the present invention discussed herein. The terms "program" or "computer program" are used here in a generic sense to refer to any type of computer code (for example, software or microcode) that can be used to program one or more processors or controllers.
    [0018] The term "network", as used herein, refers to any interconnection of two or more devices (including controllers or processors) that facilitates the transport of information (for example, for device control, data storage , data exchange, etc.) between any two or more devices and / or between multiple devices attached to the network. As should be readily appreciated, various network implementations suitable for interconnecting multiple devices can include any one of a variety of network topologies and employ any one of a variety of communication protocols. In addition, in various networks according to the present invention, any connection between two devices can represent a dedicated connection between the two systems, or alternatively, a non-dedicated connection. In addition to carrying the desired information for both devices, this non-dedicated connection can carry information that is not necessarily intended for either device (for example, an open network connection). In addition, it should be easily appreciated that several device networks as discussed at present can employ one or more wireless, wired / cable, and / or fiber optic connections to facilitate the transport of information over the network.
    [0019] It should be appreciated that all combinations of the concepts mentioned above and the additional concepts discussed in more detail below (provided these concepts are not mutually inconsistent) are contemplated as being part of the object of the invention described herein. In particular, all claimed object combinations that appear at the end of this specification are contemplated as being part of the object of the invention explained here. It should also be appreciated that the terminology explicitly used in the present, which can also appear in any descriptive report incorporated by reference, must be given a meaning that is quite consistent with the particular concepts described in the present. BRIEF DESCRIPTION OF THE FIGURES
    [0020] In the drawings, similar reference characters generally refer to the same parts through different views. In addition, the drawings are not necessarily to scale and the emphasis is generally placed to illustrate the principles of the present invention.
    [0021] Fig. 1 illustrates a block diagram of a power converter, which includes a half-bridge inverter and a control circuit, according to a representative embodiment.
    [0022] Fig. 2 illustrates a circuit diagram of a power train in an energy converter, which includes a half-bridge inverter, according to a representative embodiment.
    [0023] Fig. 3 illustrates a block diagram of a control circuit of an energy converter, according to a representative embodiment.
    [0024] Fig. 4 illustrates a circuit diagram of a power train in an energy converter, which includes a half-bridge inverter, according to another representative embodiment. DETAILED DESCRIPTION
    [0025] Generally, depositors have recognized and appreciated that it would be beneficial to provide an energy converter to supply energy for a continuous state lighting load, such as an LED-based lighting unit, which includes a half-bridge inverter that works as an integrated mains rectifier, a power inverter and an output stage inverter and provides power factor correction with respect to the continuous state lighting load.
    [0026] In view of what was mentioned above, several realizations and implementations of the present invention are directed to a power converter that includes a half-bridge inverter that functions as an integrated rectifier of the electric network (wireless), power inverter and an output stage inverter. In addition, the half-bridge inverter is controlled by a control circuit that controls the mains input current and output current (for example, for a lighting load, such as an LED-based lighting unit or load LED) independently when handling a switching signal for the half-bridge inverter. The half-bridge inverter is therefore capable of providing power factor correction.
    [0027] The control circuit includes a monitoring circuit with variable state that directly generates the switching signal using two limit signals. A first limit signal is based on the difference between the output current of the power converter and a reference output current and a second limit signal is based on the difference between a capacitor voltage measured on a capacitor in a resonance converter of the power converter. reference capacitor voltage and power. The reference capacitor voltage is determined from the measured mains input voltage, the measured bus voltage and a reference duty cycle signal, derived from the difference between the measured mains input current and an input current reference electrical network.
    [0028] More specifically, in an internal control loop of the control circuit, an error signal of an output current, indicating the difference between the output current of the power converter and the reference output current, controls a difference limit (differential value). In an external control loop of the control circuit, an error signal from an input current, indicating the difference between the mains input current of the power converter and a reference input current, controls a mean limit (value common mode). That is, the input current error signal is used to provide a reference capacitor voltage for comparison with the measured average capacitor voltage. The second limit signal (that is, the middle limit) is determined with respect to the ground voltage or the bus voltage, according to the signal of the input voltage of the electrical network of the respective half cycles of the electrical network, allowing operations without bridges. For example, the second limit signal can refer to the ground at the positive input voltage and the bus voltage at the negative input voltage.
    [0029] The outer control loop of the control circuit is also configured to switch to a cycle suppression operation to keep the bus voltage within predefined limits, for example, to avoid overfeeding for a maximum range of voltages and currents. output. For example, the cycle suppression operation can be invoked to compensate for light loads (for example, deep darkening of the lighting load), where the darkening can be controlled by an external dimming control signal (for example, 0- 10V). In other words, the external control loop of the circuit control causes periodic interruptions, keeping the switching signal in a constant high or low state. The suppression operation is periodic, and thus, it has a duty cycle that omits cycles that are effectively superimposed on the duty cycle of the switching signal. The control circuit can also aid operations and compatibility with dimming wall outlets.
    [0030] Consequently, the power converter is capable of performing functions of a mains rectifier, a power converter that provides PFC and an output stage, that is, a converter that converts bus voltage into the load's output voltage. LED. The output stage can include a series of parallel resonant converters, which can be an LCC type converter or an LLC type converter with accumulated outputs, for example. A unit power factor (PF) operation can be achieved for a range of output voltages and currents. The power converter overcomes resonant converter problems with integrated PFC in relation to the limitations of PF operation in terms of input and output voltage ranges, as well as output current, control and robustness ranges. It intrinsically supports zero voltage switching (ZVS), thus allowing miniaturization along the high frequency energy conversion.
    [0031] Fig. 1 illustrates a block diagram of a power converter, including a half-bridge inverter and a control circuit, according to a representative embodiment.
    [0032] With reference to Fig. 1, the lighting system 100 includes power source 101, power converter 110 and continuous luminaire 180. Power source 101 can supply different input AC line voltages not rectified, such as, for example, 100VAC, 120VAC, 230VAC and 277VAC, according to various achievements. The continuous state lighting load 180 can be an LED-based lighting unit, for example, including a string of LED light sources 181, 182 connected in series.
    [0033] Power converter 110 is an integrated half-bridge converter, according to a representative embodiment, including power train 130 and associated control circuit 150. Control circuit 150 is configured to receive the mains voltage vm of the mains power source 101, as well as various voltage and current M signals measured on power train 130. Control circuit 150 generates a half-bridge control signal S_HB to control power train 130 based on voltage from the mains vm and measured signals M. In various embodiments, the power train 130 includes a half-bridge inverter that receives the half-bridge control signal S_HB, a resonant converter and a transformer, for example. Power train 130 thus supplies output energy to the continuous state lighting load 180 which reacts to the S_HB half-bridge control signals. Figs. 2 and 4 show illustrative power train configurations (for example, the power train 130), and Fig. 3 is a block diagram of an illustrative configuration of a control circuit (for example, control circuit 150), according to representative achievements.
    [0034] With reference to Fig. 2, the power train 230 of a power converter includes power circuit 210, half-bridge inverter 220, resonant converter 240, transformer 250 and output circuit 260 to supply power to the load of illumination in continuous state 280, portrayed by a representative LED light source 281. The half-bridge inverter 220 is connected between the power circuit 210 and the resonant converter 240. The half-bridge inverter 220 includes first and second switches 221 and 222, which can be field effect transistors (FETs), for example, as metal oxide semiconductor field effect transistors (MOSFETs), which include functions of first and second switch diodes 223 and 224, respectively. Of course, other types of switching devices can be incorporated without departing from the scope of the present teachings. The first switch 221 is controlled by a half-bridge control signal S_HB, and the second switch 222 is controlled by another half-bridge control signal, which is effectively the reverse (complement) of the half-bridge control signal S_HB. The half-bridge control signal S_HB is generated by a controller (not shown in Fig. 2), like control circuit 350 discussed below with reference to Fig. 3.
    [0035] Power circuit 210 includes a power inductor 211 connected in series between the mains power source 201 and node N1 between the first and second switches 221 and 222 of the half-bridge inverter 220. The power circuit 210 also includes power rectifiers 215 and 216, which are connected in parallel with bus capacitor 217. The mains power source 201 is connected between power inductor 211 and node N2, located between power rectifiers 215 and 216. The mains power source 201 supplies mains voltage vm and mains input current im through power inductor 211. The mains power source 201 may also include mains filter components ( not illustrated). The bus capacitor 217 is connected in parallel with the supply rectifiers 215 and 216 and the bus voltage vb is the voltage across the bus capacitor 217.
    [0036] By operating the first and second switches 221 and 222 in response to the half-bridge control signal S_HB, the half-bridge inverter 220 provides a rectified pulsed voltage signal vx to the resonant converter 240 at the input node N1 based on the bus voltage vb. The pulsed voltage signal vx can be a pulse amplitude modulation (PWM) signal, for example, which has a duty cycle and a pulse frequency established by operating the first and second switches 221 and 222. The half-inverter bridge 220, thus, functions as an integrated rectifier of the mains, a power inverter or buck-boost and an output stage inverter, in which the output stage effectively includes the resonant converter 240, the transformer 250 and the circuit of output 260. The half-bridge inverter 220 also allows PFC by operating the first and second switches 221 and 222 in response to the half-bridge control signal S_HB.
    [0037] Resonant converter 240 is connected between node N1 of the half-bridge inverter 220 and a primary side of transformer 250. In the pictured embodiment, the resonant converter 240 is an L (L) DC converter, including first capacitor 241, second capacitor 242 and inductor 243. The first capacitor 241 and inductor 243 are connected in series between node N1 and the primary side of transformer 250. The second capacitor 242 is connected in parallel with the primary side of transformer 250. The first capacitor 241 provides vC capacitor voltage resulting from the pulsed voltage signal vx. The resonant converter 240 effectively converts the pulsed voltage signal vx emitted by the half-bridge inverter 220 into a sinusoidal voltage signal supplied to transformer 250.
    [0038] On the secondary side of transformer 250, output circuit 260 includes rectifier diodes 261 and 262 and optionally inductors 263 and 264. Rectifier diode 261 and inductor 263 are connected in series between node N3 (on the secondary side of the transformer 240) and node N4. Rectifier diode 262 is connected between the secondary side and node N4. Inductor 264 and lighting load in continuous state 280 are connected in series between node N4 and node N3. The continuous lighting load 280 thus receives output current io from the power train 230 via inductor 264.
    [0039] Fig. 3 illustrates a block diagram of a control circuit of an energy converter, as the control circuit 150 shown in Fig. 1, according to a representative embodiment.
    [0040] With reference to Fig. 3, the control circuit 350 generates a half-bridge control signal S_HB to control the power train 330, like the illustrative power train 230 shown in Fig. 2, based on input voltage of the mains supply was received from the mains power source 301 and power train feedback signals 330. In particular, the control circuit 350 receives bus voltage vb, mains current im, capacitor vC voltage and mains current output io of power train 330, which corresponds to bus voltage vb, mains current im, capacitor voltage vC and output current io depicted on power train 230 in Fig. 2, for example, and therefore the description of these feedback signals will not be repeated.
    [0041] In the pictured embodiment, control circuit 350 includes a signal generator circuit 320, also called variable state monitoring circuit, which generates the half-bridge control signal S_HB. The signal generating circuit 320 includes an adder 321, a subtractor 322, first and second buyers 323, 324, first and monostable multivibrators 325, 326, enabled cycle-suppressing OR port 327, reset OR port 328 and flip-flop 329.
    [0042] The signal generator circuit 320 has three inputs. The first input receives a first limit signal through an internal control loop, displayed as an integrated differential error signal ΔvCsw. In particular, subtractor 341 subtracts the output current io measured in the power train 330 from a previously determined reference output current ioref and provides an error signal from the output current Δio. The reference output current ioref is determined by a dimming control signal, for example. The error signal of the output current Δio is processed, for example, by means of an integral proportional controller 343 that is configured to transform the control error signal Δio into zero, to provide the integrated differential error signal ΔvCsw.
    [0043] The second input of the signal generator circuit 320 receives a second limit signal through an external control loop, displayed as an integrated error signal vC0sw, which is based on the difference between the average voltage of the capacitor vC0 and a voltage of the vC0ref reference capacitor. The average voltage of the capacitor vC0 is obtained by filtering the voltage of the capacitor vC measured in the power train 330 using low-pass filter (LP) 346, for example. The voltage of the reference capacitor vC0ref is determined by the second multiplier 372 based, in part, on the difference between the mains input current im and a mains reference input current imref, which provides a mains current error signal. Δim entry, as discussed below. Subtractor 342 subtracts the average voltage of capacitor vC0 from the voltage of reference capacitor vC0ref and provides an error signal of capacitor voltage ΔvC0. The voltage signal of capacitor ΔvC0 is processed, for example, by means of an integral proportional controller 344 to provide the integrated error signal vC0sw. The third input of the signal generator circuit 320 receives the voltage from the capacitor vC measured on the power train 330.
    [0044] The signal generator circuit adder 321 adds the integrated differential error signal ΔvCsw and the integrated error signal vC0sw and the subtractor 322 of the signal generator circuit 320 subtracts the integrated differential error signal ΔvCsw from the integrated error signal vC0sw to detect zero crossing of the mains voltage vm. Thus, adder 321 and subtractor 322 provide semi-static limits vCoff and vCon, respectively. The first comparator 323 compares the voltage of the capacitor vC (positive input) with vCoff (negative input), and sends the result of the comparison off0 to the first monoflop325 and the second comparator 324 compares the voltage of the capacitor vC (negative input) with vCon ( positive input) and sends the result of the on0 comparison to the second monoflop326. The first and second monoflop325 and 326 are activated by the results of the off0 and on0 comparisons, respectively, thus reducing noise during the detection of zero crossings.
    [0045] The OU 327 port receives off1 output from the first monoflop325 and an En cycle suppression enable signal from the Toff 375 timer block, as discussed below, and provides off2 output to the SR 329 flip-flop restart input R. For example, the OU 327 port sends a 1 and the SR 329 flip-flop is restarted when at least one of the off1 sends from the first monoflop325 or the En cycle suppression enable signal from the Toff 375 timer block is high. Meanwhile, the OU 328 port receives the on1 send of the second monoflop326 and an Rst reset signal from the monoflop376, as discussed below, and provides an on2 send to the defined input S of the SR 329 flip-flop. For example, port 328 sends a 1 and the SR 329 flip-flop is set (or reset) when at least one of the second monoflop326's on1 send or the high monoflopfor Rst reset signal.
    [0046] The output of the flip-flop S-R 329 is a square wave, whose period or duty cycle is variable, as determined by the on2 and off2 sends, the Enabling cycle Enabling signal and the Rst reset signal. The SR 329 flip-flop output is provided to the XOR 379 port, along with a signal representing the mains voltage signal vm, which is a logic port configured to perform an exclusive OR operation, providing the half-control signal bridge S_HB to control the power train 330. The XOR port 379 thus provides alternation of work cycles, in such a way that the SR 329 flip-flop output is reversed in the positive mains voltage signals vm for the signal half-bridge control unit S_HB. Therefore, the crossing of the vC capacitor voltage with the vCon and vCoff limits initiates and resets the SR 329 flip-flop, using the first and second monostable multivibrators 325, 326, the OU 327 port and the OU 328 port, resulting in the generation of the S_HB half-bridge control signal.
    [0047] As established above, the control circuit 350 performs a suppression operation, in which it controls the half-bridge switching of the power train 330 to be periodically interrupted, suppressing one or more periods of the switching duty cycle. The suppression operation causes the S_HB half-bridge control signal to remain in the low or high state by means of the En enable signal and the reset signal Rst, depending on the mains voltage signal of the mains voltage come. The enable signal En and the reset signal Rst are generated in response to the signal of the internal reference duty cycle drefx on the external control loop, the determination of which is based on the mains voltage vm, mains current im and bus voltage vb.
    [0048] More specifically, the mains voltage vm and the bus voltage vb (or a bus voltage signal derived from the bus voltage vb, also indicated by vb) are provided for the first multiplier 371. For example, the first multiplier 371 can receive the mains voltage vm and an error signal, derived from the bus voltage vb and a defined point of previously determined bus voltage (not shown). In response, the first multiplier 371 determines a signal from the imref dynamic reference mains current. Subtractor 373 subtracts the mains current im from the mains reference reference current imref sent by the first multiplier 371 to provide the input current error signal Δim. The input current error signal Δim is processed, for example, by means of an integral proportional controller 374 to provide the internal reference duty cycle signal drefx, discussed above.
    [0049] In order to operate power train 330 on or near unit power factor (FP = 1), the mains current im needs to be proportional to the mains voltage vm. Thus, the current signal from the reference mains current imref is not a constant, but follows the mains voltage vm and is controlled by feedback using the internal reference duty cycle drefx signal as a manipulation variable. It is clear that alternative means of determining the current signal of the reference mains current imref and assessing the current of the mains im for the unitary (or quasi-unitary) power factor can be incorporated without abandoning the scope of the present teachings.
    [0050] In addition, the mains voltage vm and the bus voltage vb (or a bus voltage signal derived from the bus voltage vb, also indicated by vb) are also supplied to the second multiplier 372, along with signal from the dref0 reference feedback duty cycle. In response, the second multiplier 372 determines the voltage of the reference capacitor vC0ref, which is provided for subtractor 342. As discussed above, subtractor 342 subtracts the average voltage of capacitor vC0 from the voltage of the reference capacitor vC0ref to provide the signal of integrated error vC0sw for the second input of the signal generator circuit 320 through the integral proportional controller 344.
    [0051] The dref0 reference feedback duty cycle signal is generated by limiting circuit 377 based on the drefx internal reference duty cycle signal sent by integral proportional controller 374. Limiting circuit 377 sends a duty cycle signal dref0 equal to the drefx internal reference duty cycle signal when the drefx internal reference duty cycle signal is within the predefined limits. However, when the signal of the internal reference duty cycle drefx exceeds or does not reach the minimum limit, the signal of the duty cycle dref0 is stuck to that limit. Consequently, the second multiplier 372 determines the voltage of the reference capacitor vC0ref as:
    [0052] vC0ref = vb * dref0 (in negative values of the mains voltage vm); and
    [0053] vC0ref = vb * (1-dref0) (in positive values of the mains voltage vm).
    [0054] Meanwhile, the Toff 375 timer block receives the internal reference duty cycle signal drefx sent by the integral proportional controller 374 and the x mark sent by the limiting circuit 377 discussed below.
    [0055] Generally, under normal conditions, the signal of the reference feedback duty cycle dref0 is equal to the signal of the internal reference duty cycle drefx. Normal conditions occur when the output energy of the lighting charge in continuous state, for example, the lighting charge in continuous state 280, is in a predetermined range, including full charge. Within this output energy range, the drefx internal reference duty cycle signal is expected to be within a certain predefined maximum (or minimum) limit. In light loads or without loads, such as during darkening operations of the lighting load in continuous state 280, the signal of the internal reference duty cycle drefx is fixed by the limiting circuit 377 at the previously defined value to prevent it from exceeding the maximum limit ( or minimum). In this case, mark x is equal to 1, allowing the Toff 375 timer block to reset the RS 329 flip-flop of the signal generator circuit 320 through the En enable signal. When the RS 329 flip-flop is reset, the inverter switching is periodically disabled. In this way, the internal reference duty cycle signal drefx controls the duty cycle of the interruption of the Toff 275 timer block, for example, using the off period as a manipulation value with the on period as a fixed value. The internal reference duty cycle signal drefx forms the resulting (effective) duty cycle: drefx = dref0 * dToff, where dToff is the duty cycle of the cycle suppression operation. It is clear that the duty cycle of the interruption of the Toff 375 timer can be implemented by alternative means, such as a fixed frequency or fixed off periods, without abandoning the scope of the present teachings.
    [0056] In the pictured embodiment, the integral proportional controller 344 receives the inverse of the En enable signal from timer Toff 375. Thus, during off periods (for example, when the RS 329 flip-flop reset is kept high by the enable signal En), the integral proportional controller 344, which receives the voltage difference signal from capacitor ΔvC0, is disabled to prevent leakage of the integrated error signal vC0sw. The monoflop376 restarts switching of the inverter after each shutdown period, for example, by supplying a high signal to the RS 329 flipflop through reset port 328.
    [0057] Consequently, the half-bridge switching is periodically interrupted and the half-bridge control signal S_HB remains either in the low or high state according to the suppression operation, depending on the half-cycle of the mains voltage vm. The interruption time (or cycle suppression time) is controlled in response to the drefx internal reference duty cycle signal, for example, when the drefx internal reference duty cycle signal exceeds a maximum (or minimum) limit previously established, for example, as a result of configurations of a light cargo operation. As stated above, the suppression operation is periodic and therefore has a suppression operation duty cycle that is effectively superimposed over the switching duty cycle.
    [0058] In various alternative embodiments, other control implementations can be used. For example, in a light charge mode, the on time of the modulator can be controlled specifically. In addition, if there is no explicit ioref reference output current (for example, there is no DALI, DMX, 010V), the ioref reference output current can be set to a previously set value or, in connection with darkening, for example, the reference output current ioref can be determined from a darkening phase angle (i.e., the darkening level) applied by a darkening device.
    [0059] As mentioned above, the control circuit 350 is not limited by the type of power train 330 to which it supplies the half-bridge control signal S_HB, as long as the bus voltage vb, the input current of the mains im, the voltage of the capacitor vC and the output current io of the power train 330 can be measured. For example, Fig. 4 illustrates a circuit diagram of a power train in an energy converter, including a half-bridge inverter, according to another representative embodiment.
    [0060] With reference to Fig. 4, the power train 430 of a power converter includes a power circuit 210 and half-bridge inverter 220, which are substantially the same, as discussed above, with reference to Fig. 2 , then the descriptions are repeated. Power train 430 also includes a resonant converter 440, transformer 450 and output circuit 460 to supply power for continuous state lighting load 480, depicted by the representative LED light source 481.
    [0061] Resonant converter 440 is connected between node N1 of the half-bridge inverter 220 and a primary side of transformer 450. In the pictured embodiment, the resonant converter 440 is an LLC converter, including a capacitor 441 and inductor 443, which they are connected in series between node N1 and the primary side of transformer 450. Capacitor 441 supplies voltage from capacitor vC resulting from the pulsed voltage signal vx. The resonant converter 440 effectively converts the pulsed voltage signal vx sent by the half-bridge inverter 220 into a sinusoidal voltage signal supplied to transformer 450.
    [0062] On the secondary side of transformer 450, output circuit 460 includes rectifier diodes 461 and 462, inductor 463 and capacitors 467 and 468. Rectifier diode 461 is connected between the secondary side of transformer 440 and node N3. Inductor 463 and rectifier diode 462 are connected in series between node N3 and node N4, which correspond to the input of the continuous state lighting load 480. Capacitor 467 is connected between node N3 and node N5 and the capacitor 468 is connected between node N4 and node N5. The continuous state lighting load 480 is also connected between node 4 and node 5 in parallel with capacitor 468 and thus receives output current io from power train 430 through rectifier diode 462.
    [0063] Although several inventive achievements have been described and illustrated at present, those skilled in the art will easily devise a number of other means and / or structures to carry out the function and / or obtain the results and / or one or more of the advantages described in the present and each of these variations and / or modifications is considered within the scope of the embodiments of the present invention described herein. More generally, those skilled in the art will easily appreciate that all the parameters, dimensions, materials and configurations described herein are intended to be examples and that the actual parameters, dimensions, materials and / or configurations will depend on the specific application or applications in which the teachings of the present invention are used. Those skilled in the art will recognize or be able to determine using no more than routine experimentation many equivalents of the specific embodiments of the present invention described herein. It should, therefore, be understood that the aforementioned achievements are presented by way of example only and that, within the scope of the appended claims and their equivalents, realizations of the present invention may be practiced differently from the specifically described and claimed. Realizations of the present invention are directed to each individual characteristic, system, article, material, assembly and / or method described herein. In addition, any combination of two or more characteristics, systems, articles, materials, assemblies and / or methods, if these characteristics, systems, articles, materials, assemblies and / or methods are not mutually inconsistent, is included within the scope of this invention.
    [0064] All definitions, as defined and used in the present, should be understood as overlapping dictionary definitions, definitions in documents incorporated as reference and / or common meanings of the defined terms.
    [0065] The indefinite articles "one" and "one", as used in this specification and in the claims, unless clearly indicated to the contrary, should be understood as indicating "at least one".
    [0066] It should also be understood that, unless clearly indicated to the contrary, in any methods claimed herein that include more than one step or action, the order of the steps or actions of the method is not necessarily limited to the order in which the steps or actions of the method are presented. In addition, reference numbers and other symbols appearing in the claims in parentheses are provided for convenience only and should not be construed as limiting the claims in any way.
    权利要求:
    Claims (15)
    [0001]
    1. ENERGY CONVERTER DEVICE, for converting energy from a power source of the mains (201) to supply a continuous load of lighting (280), in which the device comprises: - a converter (230) comprising an inverter half-bridge (220) acting as a power inverter and output stage inverter of an output stage, in which the half-bridge inverter (220) comprises a series of switches (221, 222) and the output stage comprises a resonant capacitor (241, 441); and - a control circuit (350) configured to control a mains input current (im) and an output current (io) of the device independently by supplying a switching signal (S_HB) to the series of switches on the half-bridge inverter (220), in which the switching signal has a duty cycle, frequency and cycle suppression duty cycle; characterized by the control circuit (350) being configured to supply the switching signal using a first and a second limit signal (ΔvCsw, vC0sw), in which the second limit signal (vC0sw) is based on a difference between a capacitor voltage ( vC) measured on the resonant capacitor and a voltage of a reference capacitor (vC0ref).
    [0002]
    2. DEVICE, according to claim 1, characterized in that the first limit signal is based on the difference between the output current (io) and a reference output current (ioref).
    [0003]
    3. DEVICE, according to claim 2, characterized in that the voltage of the reference capacitor (vC0ref) is determined from a measured mains voltage (vm), a measured bus voltage (vb) and a signal from the reference work (drefx) derived from a difference (Δim) between a measured mains input current (im) and a reference mains input current (imref).
    [0004]
    4. DEVICE, according to claim 2, characterized in that the control circuit comprises a variable state monitoring circuit configured to generate the switching signal (S_HB) when comparing state variables with the first and second threshold signals (ΔvCsw, vC0sw ), respectively, to implement a suppression operation.
    [0005]
    5. DEVICE, according to claim 4, characterized by the variable state monitoring circuit comprising: - a first comparator (323) configured to compare a sum of a first and a second limit signal with the capacitor voltage (vC) for provide an Off signal; - a second comparator (324) configured to compare a difference between a first and a second limit signal with the capacitor voltage (vC) to provide an On signal; and - a flip-flop (325) configured to generate the switching signal (S_HB) based on the Off signal of the first comparator (323) and the On signal of the second comparator (324).
    [0006]
    6. DEVICE, according to claim 5, characterized by the flip-flop (325) being further configured to generate the switching signal (S_HB) based on an enabling signal (Em) and a derivative reset signal (Rst) of the reference duty cycle signal (drefx).
    [0007]
    7. DEVICE, according to claim 6, characterized by the enable signal (En) and the Off signal indicate an end of a switching signal pulse (S_HB), and the reset signal (Rst) and the On signal indicate a start of a pulse of the switching signal (S_HB).
    [0008]
    8. DEVICE, according to claim 7, characterized by the control circuit (350) further comprising a logic gate configured to perform an exclusive OR operation on a flip-flop output (325) and a signal that represents a voltage signal of the measured mains (vm), in order to invert the flip-flop output (325) in positive signals of the measured mains voltage (vm) to supply the switching signal (S_HB), in such a way that the inverter half -pole (220) also functions as an integrated rectifier of the electrical network.
    [0009]
    9. DEVICE, according to claim 2, characterized by the control circuit (350) comprising: - a signal generating circuit (320) configured to receive a first and a second limit signal (ΔvCsw, vC0sw); - a timing block (375) configured to provide an enable signal (En) in response to a reference internal duty cycle signal, which is based on a difference between a mains input current (im) and an input current from the reference electrical network (imref); and - a monoflop (325) configured to provide a reset signal (Rst) in response to the enable signal (En), where the enable signal (En) and the reset signal (Rst) cause the generator circuit signal (320) selectively interrupt the duty cycle according to the duty cycle of the cycle suppression operation.
    [0010]
    10. DEVICE, according to claim 9, characterized in that the signal generating circuit (320) comprises: - a first comparator (323) configured to compare the capacitor voltage (vC) with the sum of a first and a second limit signal (ΔvCsw, vC0sw), and send a first comparison result; - a second comparator (324) configured to compare the capacitor voltage (vC) with a difference between a first and a second limit signal (ΔvCsw, vC0sw), and send a second comparison result; - a first logic gate configured to receive the first comparison result and the enable signal (En), and send a logic signal signal Off; - a second logic port configured to receive the second comparison result and the reset signal (Rst), and send a logical signal result On; and - a flip-flop (325) configured to generate the switching signal (S_HB) in response to the logic signal result Off and the logic signal result On.
    [0011]
    11. DEVICE, according to claim 10, characterized by the flip-flop (325) comprising a start-and-restart flip-flop (RS), in which the logical Off signal result is sent to the flip-flop reset input RS, the On signal logic output is sent to the RS flip-flop set input and the switching signal is sent from an RS flip-flop output.
    [0012]
    12. DEVICE, according to claim 11, characterized in that each of the first and second gates comprises an OR logic gate.
    [0013]
    13. DEVICE, according to claim 9, characterized by the control circuit further comprising: - a first multiplier (371) configured to multiply a mains voltage (vm) and a bus voltage signal (vb) measured in a bus capacitor (217) of the power converter, and send the input current from the reference mains (imref); - a subtractor (3730 configured to determine the difference between the mains input current (im) and the reference mains input current (imref) sent by the first multiplier (371); and - a second multiplier (372) configured to multiply the mains voltage (vm), the bus voltage (vb), and a reference feedback duty cycle signal (dref0) based on the difference between the mains input current (im) and the input current of the reference electrical network (imref) determined by the subtractor (373), and send the voltage of the reference capacitor (vC0ref).
    [0014]
    14. DEVICE, according to claim 13, characterized by the control circuit also comprising: - a first integral proportional controller (343) configured to integrate the difference (Δio) between the reference output current (ioref) and the output (io) to provide the first limit signal (ΔvCsw); and - a second integral proportional controller (344) configured to integrate the difference (ΔvC0) between the reference capacitor voltage (vC0Ref) and the capacitor voltage (vC) to provide the second limit signal (vC0sw).
    [0015]
    15. DEVICE, according to claim 14, characterized by the control circuit further comprising: a third integral proportional controller (374) configured to integrate the difference (Δim) between the input current of the electrical network (im) and the current of input of the reference electrical network (imref), and send an internal reference duty cycle signal (drefx).
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    法律状态:
    2017-11-07| B25D| Requested change of name of applicant approved|Owner name: KONINKLIJKE PHILIPS N.V. (NL) |
    2017-11-21| B25G| Requested change of headquarter approved|Owner name: KONINKLIJKE PHILIPS N.V. (NL) |
    2017-12-05| B25A| Requested transfer of rights approved|Owner name: PHILIPS LIGHTING HOLDING B.V. (NL) |
    2018-12-18| B06F| Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]|
    2019-07-30| B06U| Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]|
    2020-02-04| B06A| Patent application procedure suspended [chapter 6.1 patent gazette]|
    2020-09-01| B09A| Decision: intention to grant [chapter 9.1 patent gazette]|
    2020-12-15| B16A| Patent or certificate of addition of invention granted [chapter 16.1 patent gazette]|Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 13/12/2011, OBSERVADAS AS CONDICOES LEGAIS. |
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    US61/425,/806|2010-12-22|
    US201161441484P| true| 2011-02-10|2011-02-10|
    US61/441,484|2011-02-10|
    PCT/IB2011/055647|WO2012085759A2|2010-12-22|2011-12-13|Power converter device for driving solid state lighting load|
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